Artificial intelligence: Google works to create next-gen chips faster than humans

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Artificial intelligence: Google
Artificial intelligence: Google works to create next-gen chips faster than humans

To be faster at solving new instances of the problem, the new artificial intelligence method utilizes past experience for becoming better

As acute semiconductor or chip shortage is being faced by the world, a Google-researchers team is working on to design next-generation artificial intelligence (AI) chips, and has created an AI model that allows chip design to be performed by artificial agents with more experience than any human designer.

To be faster at solving new instances of the problem, the new artificial intelligence method utilises past experience for becoming better.

“Our method was used to design the next generation of Google’s artificial intelligence (AI) accelerators, and has the potential to save thousands of hours of human effort for each new generation”, the team wrote in a paper appeared in the scientific journal Nature.

“Finally, we believe that more powerful AI-designed hardware will fuel advances in AI, creating a symbiotic relationship between the two fields”, they noted.

A design that optimises the placement of different components on the chip could be generated by the model in about six hours.

To achieve this, the Google team used a dataset of 10,000 chip layouts for a machine-learning model, which was then trained with reinforcement learning.

“Our RL (reinforcement learning) agent generates chip layouts in just a few hours, whereas human experts can take months”, Anna Goldie, research scientist at Google Brain, who took part in the research, said in a tweet.

“These superhuman AI-generated layouts were used in Google’s latest AI accelerator (TPU-v5)”, she added.

To enhance the performance of various artificial intelligence applications, Google has used the model to design its next generation of tensor processing units (TPUs), which run in the company’s data centres.

Chip floor-planning is the engineering task of designing the physical layout of a computer chip.

To produce manufacture-able layouts, chip floor planning, despite five decades of research, has defied automation, requiring months of intense effort by physical design engineers.

“In under six hours, our method automatically generates chip floor plans that are superior or comparable to those produced by humans in all key metrics, including power consumption, performance and chip area,” according to the Google AI team.

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